The present invention relates to switched mode power supplies and more particularly to the input rectifier and providing for phase controlled voltage regulation of the AC line voltage to maintain a nominal DC voltage to the inverter section of the power supply.
In recent years, switched mode power supplies have captured a significant share of the market for computer-based power supplies. Of these units, the off-line inverter is the most attractive requiring no 60 Hz magnetic components for its operation. One section of this type of power supply is the input rectifier which is used to produce a DC bulk voltage from the AC input line. This raw DC bulk voltage is then switched at high frequency by the inverter section and pulse width modulated to produce a stable output voltage independent of line and load variations.
Present designs, in response to computer system demands for "brown-out" capabilities to 66% of nominal line conditions, permit the bulk DC voltage to vary from approximately 170 to 360 V DC, when operating from a nominal voltage of 200 to 240 V AC. The upper limit of 360 V is compatible with the present state of transistor technology incorporating 400 V high speed devices. The lower limit, however, presents somewhat of a problem in that the turns ratio of the inverter's high frequency transformer is set by the ratio of low line DC input voltage to the required DC output voltage, assuming the inverter is operating at maximum pulse width. Increasing the input voltage results in decreasing the pulse width. Large voltage variations, therefore, result in the inverter operating at a fraction of its power switch section capability. There is a need for a circuit which will regulate this bulk voltage to a nominal value from 300 to 360 V DC for all line-load conditions. It is also desirable that this circuit be efficient and not require a line frequency transformer for its operation.
The present invention provides a solution to the above concerns and enables regulation of the bulk DC voltage available to the inverter to within 1% of the design limit when operating in the phase controlled modes of operation. The circuit has the further advantage of having its greatest power factor at high line conditions unlike conventional phase-controlled circuits which penalize the user for his "brown-out" capabilities by presenting a low power factor under normal line conditions.